The field of the disclosure relates generally to fabrication of wafers utilized as solar cells, and more specifically to coplanar solar cell metal contact annealing in plasma enhanced chemical vapor deposition.
A solar cell generally includes an active semiconductor structure including two semiconductor layers in facing contact with each other at a semiconductor junction. When illuminated by the sun or otherwise, the solar cell produces a voltage between the semiconductor layers and thence between a front side and a back side of the active semiconductor structure. As utilized herein, “front side” refers to the side facing toward the sun, and “back side” refers to the side facing away from the sun. Advanced solar cells may include more than two semiconductor layers and their respective semiconductor junctions. The various pairs of semiconductor layers of the advanced solar cells are tuned to the various spectral components of the sun to maximize the power output of the solar cell.
Electrical contacts are applied to both the front side and to the back side of the solar cell. In known solar cells, the back electrical contact is generally is a continuous electrically conductive layer deposited across all or most of the entire back side of the active semiconductor structure, inasmuch as the back side faces away from the sun during service. The front electrical contact normally includes a plurality of interconnected current-gathering strips deposited upon the front side of the active semiconductor structure. At discrete locations, attachment pad regions are defined on the strips so that external electrical leads may be affixed to the front electrical contact.
Many such solar cells are electrically connected together to make a module. The conventional way of interconnecting cells is by soldering highly conductive tabs to the front and rear of neighboring cells. If all the interconnection circuitry is moved to the rear of the module, it allows for an optimized module efficiency through a corresponding increase in the packing density of the cells. One way to form the above mentioned rear circuitry is to make the solar cells co-planar. In a co-planar solar cell both “front” and back contact pads are formed on the backside of the solar cell. The two contact pads are generally insulated from one another utilizing a dielectric layer.
Solar cells are used in space and terrestrial applications. Particularly for space applications where the solar cells may be inaccessible for many years, and go through many thousands of sunlight/shade (i.e., heating/cooling) duty cycles without any maintenance, the solar cells must be highly reliable. If the structure and performance of any element of the solar cell degrade during service, the power output of that solar cell may be permanently reduced and eventually lost.
Operable solar cells are known, but there is an ongoing need for an approach to increase the reliability of existing types of solar cells and to achieve high reliability in future types of solar cells. The fabrication process is one area where changes can be made to provide the above mentioned increase in reliability.
The dielectric layer in multiple junction co-planar solar cells is required to be robust and the processing of the dielectric layer during the fabrication process is generally done at a temperature that does not exceed 400° C. When the temperature exceeds 400° C. during the fabrication process, the multiple junction semiconductor material may be degraded, or the electrical resistance between metal contacts and semiconductor material may be increased. One process for fabricating the dielectric layer, is to apply a dielectric film through a plasma enhanced chemical vapor deposition (PECVD) process. A dielectric film fabricated utilizing the PECVD process results in a good insulator with low stress and typically without pinholes in the film. On the other hand, to anneal the metal contacts for low electrical resistance between semiconductor material and the metal contacts, exposure to a temperature approximate 400° C., for a duration of between ten and fifteen minutes is generally utilized.
In the fabrication of multiple junction co-planar solar cells, metal contact annealing and plasma enhanced chemical vapor deposition (PECVD) are two separate process steps. The deposition temperature used in PECVD, which follows the metal contact annealing step, is significantly lower than the temperatures encountered during the annealing step, to avoid over annealing of the metal contacts. The lower temperature for PECVD is not optimum. To that end, it is believed that a higher dielectric film electrical isolation yield is obtainable through an optimized PECVD temperature, which is elevated from temperatures currently used in the PECVD process. It follows that there is an unfulfilled need for a process that avoids metal contact over annealing without lowing the PECVD temperature, and that such a process would result in a higher dielectric film electrical isolation yield.